IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
VLSI-SoC 2016
September 26-28, 2016 Tallinn, ESTONIA

PhD Forum

VLSI-SoC 2016’s PhD Forum is a poster session aimed at the exchange of ideas and experiences of PhD students from different parts of the world. Selected PhD students have an opportunity to discuss their thesis and research work with specialists within the system and design automation communities. Thus, PhD students receive valuable feedback and gain exposure in the job market. On the othe rhand, this forum provides a great chance for industry officials to meet junior researchers, giving an avenue for incorporating the latest research developments in their companies.

Accepted Presentations

  • Performance Constrained Static Energy Reduction in Tiled CMP Caches, Shounak Chakraborty,  Indian Institute of Technology Guwahati, India [Abstract]
  • A SAT-based Scheduling Framework for Multi-Processor Systems on Chips, Christian Schöler, Hochschule Hamm-Lippstadt, Germany [Abstract]
  • Error Compensation and Self-Repair for FPGA-based Processors, Farnoosh Hosseinzadeh,  BTU Cottbus-Senftenberg, Germany [Abstract]
  • A Metric-Guided Circuit Design Methodology for Aging Guardband Compensation, Andres Gomez, National Institute for Astrophysics, Optics and Electronics - INAOE, Mexico [Abstract]
  • A Method of EFSM Model Extraction from HDL Descriptions: Application to Hybrid Verification, Sergey Smolov, Institute for System Programming of Russian Academy of Sciences, Russia [Abstract]
  • Hardware Implementation of a Spiking Neural P based Multiplier, Carlos Díaz, Instituto Politecnico Nacional, Mexico [Abstract]
  • A fully integrated 2.4GHz phase shifter for an enhanced SoC solution, Giulio D'Amato,  Politecnico di Bari, Italy [Abstract]
  • Frame-level Redundancy Scrubbing Technique for SRAM-based FPGAs, Jorge Tonfat, Universidade Federal do Rio Grande do Sul – UFRGS, Brazil [Abstract]
  • Exploration of Reliability-oriented Design Techniques for Multicore Systems, Felipe Rocha da Rosa, Universidade Federal do Rio Grande do Sul – UFRGS, Brazil [Abstract]
  • LBDR3D: Logic-Based Distributed Routing for Partially Vertically Connected 3D Network-on-Chips, Behrad Niazmand, Tallinn University of Technology, Estonia [the abstract is available on the conference USB stick]

Schedule

Tuesday, September 27, Posters room

10:00 - 10:30 PhD Forum Short Presentations

    Moderator: Mario Shölzel, IHP/Potsdam University, Germany

10:30 - 11:10 Coffee break / PhD Forum Poster Session

Best PhD Forum Presentation Award

The PhD forum selection committee will review all presented posters and recommend one poster for the Best PhD Forum Presentation Award.

The winner will be announced on Tuesday evening during the Gala Dinner at the Estonian Open air Museum.

Phd Forum Committee

Chair: Mario Schölzel, IHP GmbH, Gemany

  • Salvador Mir, TIMA Laboratory, France
  • Matteo Sonza Reorda, Politecnico di Torino, Italy
  • Maksim Jenihhin, Tallinn University of Technology, Estonia
  • Manfred Glesner, TU Darmstadt, Germany

 

The PhD Forum is supported in part by the Estonian National Doctoral School in Information and Communication Technologies.