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Welcome to RecoSoC 2016!

Over the past decade ReCoSoC has established itself as a international reference event for research in the areas of reconfigurable and communication-centric systems-on-chip. Its informal and dynamic philosophy encourages technical and scientific interactions of both academic and industrial participants through presentations and special sessions reporting latest advances in the related areas.

ReCoSoC 2016 will be held in Tallinn, ESTONIA at Nordic Hotel Forum.

Special Sessions

ReCoSoC organizes several special sessions. You are cordially invited to submit your papers to the following special sessions:


Secure multi/many-core architectures in the era of Internet-of-Things

Organized by:
Martha Johanna Sepulveda (TUM, Germany)
Vianney Lapotre (UBS, France)
Guy Gogniat (UBS, France)

Multi/many-core architectures, as a key technology enabler of the new computation paradigm Internet-of-Things (IoT), are currently exposed to attacks. Malicious applications can be downloaded at runtime to the MPSoC, infecting IPs and creating new vulnerabilities.

As such devices are involved in several critical applications, security has emerged as an extremely important issue in multi/many-core system design. By blending seamlessly with the environment around us they are able to process and store sensitive data. Security for multi/many-core system can be integrated at the computation or communication structures by hardware or software-based protection mechanisms. Each solution must be able to meet the security requirements under tight resource and performance constraints. The integration of efficient and effective security solutions remains a challenge.

Authors of research manuscripts that deal with methodologies, algorithms, architectures and study cases of secure multi/many-core architectures operating in the context of IoT are invited to present their 8-pages contributions.


Emerging Technologies for Reconfigurable Systems in the Manycore Era

Organized by:
Davide Patti (Univ. of Catania, Italy)
Maurizio Palesi (Univ. of Enna - KORE, Italy)

Current multicore architectures formed by tens of processing cores will be soon replaced by the next generation of manycore architectures with hundreds of cores. Although manycore architectures are envisaged as the most effective for meeting the energy and performance constraints which characterize future applications, some technical and technology aspects start to exacerbate. Dark silicon, memory wall, on-chip communication scalability, represent just a short list. Emerging technologies, novel architectures and design techniques, which stress the reconfiguration concept, are currently investigated by the research community as viable opportunities for tackling the performance-in-the-energy-envelop problem in the manycore era.

The aim of this Special Session is to bring together a group of leading academic researchers and technology experts to provide a platform for discussion on novel ideas and studies related to design, modelling and analysis of reconfigurable manycore architectures based on emerging technologies.


System Design for Heterogeneous 3D-Architectures

Organized by:
Thilo Pionteck (Universität zu Lübeck, Germany)
Alberto Garcia-Ortiz (Universität Bremen, Germany)
Gilles Sassatelli (LIRMM, France)

New production methods enable the design of heterogeneous 3D-System-on-Chips (3D-SoCs), which consist of stacked silicon dies manufactured with different technologies. In contrast to homogeneous SoCs, this allows to adjust the technological characteristics of dies to the conflicting requirements of components on different layers. Heterogeneous 3D-SoCs provide unprecedented integration possibilities for embedded and high performance systems. To exploit the potential of heterogeneous 3D-SoCs, new design methods have to be developed which in particular consider the heterogeneity of the silicon layer and, thus, the different manufacturing technology of dies within a 3D stack.

This special session addresses all aspects related to system design for heterogeneous 3D-SoCs. Among these, the enormous design space for heterogeneous 3D-SoCs is the most challenging one. Processing elements can be implemented on different dies in different technologies which also effects their performance, power requirements and area characteristics. For the communication network the special characteristic of Through-Silicon Vias (TSVs) have to be considered which leads to inhomogeneous bandwidth capabilities. Overall, there are several new aspects to be considered which cannot be solved by just extending existing SoC design approaches to the third dimension.

Authors are invited to submit papers in the field of heterogeneous 3D system design with a special focus on

  • 3D communication architectures, in particular Network-on-Chips (NoCs)
  • (Systematic) design space exploration
  • Overlay and virtual architectures for 3D
  • Task mapping
  • Runtime adaptation

Smart Health

Organized by:
Hassan Ghasemzadeh, Washington State University, US
Masoumeh Ebrahimi, UTU, Finland and KTH, Sweden

The special session on Smart Health is a forum for researchers and developers from academia and industry to present results and discuss ways to advance the field. The special session covers topic on wireless, connected, and mobile health research as a multidisciplinary area spanning computer science and engineering, electrical engineering, biomedical engineering, nursing, medicine, and public health. The special session will include presentations of theoretical and experimental research, prototyping efforts, case studies and advances in technology related to smart health systems and internet of things for healthcare applications.

The organizers of Smart Health seek papers presenting significant and novel research results on emerging smart health systems. We especially encourage submissions that present novel device design, system development, algorithm design, implementation, experimentation, field studies, and creative use of technologies in addressing healthcare challenges. We invite submissions on a wide range of smart health research including but not limited to:

  • Infrastructure for smart health, e.g. prototyping, wearable devices , implantable sensors and disposable electronics
  • Internet of things for smart health, e.g. could computing, elastic computing, fog computing, and mobile to cloud computing
  • Algorithms and architectures for smart health, e.g. signal processing, machine learning and data analytics
  • Scalable and reconfigurable smart health systems, e.g. interfaces, adaptive algorithms, benchmarking and validation



Authors are invited to submit contributions as maximum 8 page papers in IEEE conference format. ReCoSoC 2016 follows a double-blind review process: author's should not reveal their identity in the manuscript. Contribution(s) have to be submitted electronically through the EasyChair portal of the conference: https://easychair.org/conferences/?conf=recosoc2016