Difference between revisions of "Pipelined Version"

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(Created page with " Fig 1: System Block Diagram ===Current versions (VHDL)=== * 28 Feb 2015: [[:File:PicoPipe_8bit.zip|8-bit pipelined]...")
 
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* Pipelining PC and SP
 
* Pipelining PC and SP
 
* Adding Branch prediction etc.
 
* Adding Branch prediction etc.
 +
* Still needs NOPs inserted after JMPs and HALT (To prevent data hazards.)

Revision as of 18:41, 28 February 2015

 text
Fig 1: System Block Diagram

Current versions (VHDL)

Future plans

  • Pipelining PC and SP
  • Adding Branch prediction etc.
  • Still needs NOPs inserted after JMPs and HALT (To prevent data hazards.)