Difference between revisions of "Glossary"

Revision as of 20:52, 20 April 2010

Hard core	Physical manifestations of the IP design
CSP	Communicating Sequential Processes
Firm core	(or semi-hard core) IP-s carrying placement data but configurable for various applications
ESL	Electronic System Level
CLB	Configurable Logic Block (of FPGA)
HLS	High Level Synthesis
IEEE	Institute of Electrical and Electronic Engineers, Inc.
IP (core)	Intellectual Property (core), synonymous with Virtual Component (VC)
VHDL	Very high speed Hardware Description Language
VITAL	VHDL Initiative Toward ASIC Libraries
VLIW	Very Long Instruction Word (processor)
VLSI	Very Large Scale Integration (Integrated Circuit)
ISA (model)	Instruction Set Architecture (model)
ASIC	Application Specific Integrated Circuit
ACM	Adaptive Computing Machine
LRM	Language Reference Manual
PCB	Printed Circuit Board
netlist	A list of logic gates and associated interconnections making up an integrated circuit
SoC	System-on-Chip
SW	Software
Soft core	IP presented as a netlist or HDL code
DSM	Deep SubMicron
DSP	Digital Signal Processor
HW	Hardware
UML	Universal Modeling Language
VSIA	Virtual Socket Initiative Alliance
RTL	Register-Transfer Level
CDFG	Control Data Flow Graph
NoC	Network-on-Chip
SDL	Specification and Description Language, standardized by ITU (International Telecommunication Union)
HSCO	Hardware-Software Co-Design
SLB	System Level Block
ASM	Abstract State Machines
EDA	Electronic Design Automation
XPP	eXtreme Processing Platform of PACT
FPGA	Field Programmable Gate Array

@@ Line 17: / Line 17: @@
 |-
 | VHDL 	|| Very high speed Hardware Description Language
+|-
+| VITAL || VHDL Initiative Toward ASIC Libraries
 |-
 | VLIW 	|| Very Long Instruction Word (processor)