Difference between revisions of "Main Page"
(→Labs Regulations) |
(→Labs Requirements) |
||
| Line 41: | Line 41: | ||
===Labs Requirements=== | ===Labs Requirements=== | ||
For this labs we assume that you have passed the following courses: | For this labs we assume that you have passed the following courses: | ||
| − | * IAY0600 : Digital Systems Design | + | * IAY0600: Digital Systems Design |
* IAY0330: Embedded Systems | * IAY0330: Embedded Systems | ||
| − | So you are familiar with digital systems (you should be familiar with High Level Description Languages like VHDL or Verilog (our main focus is on VHDL but if you know Verilog, its also ok!)) and Embedded Systems. | + | So that you are familiar with digital systems (you should be familiar with High Level Description Languages like VHDL or Verilog (our main focus is on VHDL but if you know Verilog, its also ok!)) and Embedded Systems. |
===Labs Regulations=== | ===Labs Regulations=== | ||
Revision as of 23:24, 2 February 2016
Contents
Introduction
Welcome to SoC design wiki. We started this series of labs/projects from 2014 and we are upgrading and fixing problems every year to make it better.
Learning Objectives
By completion of this SoC Design labs, you should be able to:
|
Tutorials:
|
|
Project:
Workshop:
|
Labs Requirements
For this labs we assume that you have passed the following courses:
- IAY0600: Digital Systems Design
- IAY0330: Embedded Systems
So that you are familiar with digital systems (you should be familiar with High Level Description Languages like VHDL or Verilog (our main focus is on VHDL but if you know Verilog, its also ok!)) and Embedded Systems.
Labs Regulations
|
Important dates
|
|
Lab grading policy
|
|
|
Contact Us
In case of any questions, please contact us:
 |
• Karl Janson |
|---|---|
| • Siavoosh Payandeh Azad |
Lab Tutorials
The following is the test lab for the first week of the semester. :) Enjoy!
Here you can find lab manuals for the tutorials:
- Lab 1: Kernel Driver
- Lab 2: Building custom SoC on ZedBoard
- Lab 3: Custom IP creation
- Lab 4: Setup 1 board system for the lab
Labs additional readings
Additional reading and more information about the labs can be found here:
- Creating a new project in Vivado
- Basic information about Linux
- Using ZedBoard
- Lab1 additional material
- Lab2 additional material
- Lab3 additional material
- Lab4 additional material
Labs known issues
Please add related issues to each lab under the Labs known Issues page.
Tutorial Labs Archive
Audio Mixer Project
Project Description
Design project is defined in each round for System on Chip design(IAY0550) students with the aim of providing them with real world experience of working on a SoC project, teamwork and project management. This wiki will serve as a platform for students to pass-on their designs and documents to students in the next round of course. Full description of the project can be found Project Description page.
Git
The project code should be stored in git. Every component of the project should be uploaded as a separate branch.
There exists a dedicated Github repository for the course, that can be accessed here: [1]
Rules and Regulations
Please read the following page before you start the project:
Team Organization
The following page is for clear and transparent team organization for design project:
Design project parts
The following pages contain data about different parts of the project:
- General
- Amplifier Design
- Audio Interface
- Communication
- External Control Panel
- Filter Design
- Web Server
We keep separate pages for special design parts that will be used/shared by different groups:
