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[[File:Logo_SoC.png|300px|right]]
 
[[File:Logo_SoC.png|300px|right]]
  
−
==Introduction==
+
=Introduction=
−
Welcome to SoC design wiki. We started this series of labs/projects in 2014 and we are upgrading and fixing problems every year to make it better.
+
Welcome to the wiki for the SoC Design course! We started this series of labs/projects in 2014 and we are upgrading and fixing problems every year to make it better.
−
===Learning Objectives===
+
 
−
By completion of the SoC Design labs, you should be able to:
+
Slides for the introductory presentation are available [https://docs.google.com/presentation/d/1n4VfibjQcfBR-hYUb8m64C-zhhVq0kOHvIEwQkTPN8I/edit?usp=sharing here]
 +
 
 +
==Learning Objectives==
 +
After the completion of the labs, you will be able to:
  
 
{|
 
{|
 
|style="vertical-align:top;"|
 
|style="vertical-align:top;"|
 
'''Tutorials''':
 
'''Tutorials''':
−
#Kernel Driver: How to write a simple kernel driver and use it to control a simple IP on ZedBoard.
+
# Make Linux kernel drivers: Write a simple kernel driver for controlling a simple IP (intellectual property) on ZedBoard.
−
#Building custom SoC on ZedBoard:
+
# Build custom SoC (System-on-Chip) on ZedBoard:
−
#*Creation of simple SoC with Vivado from existing IPs
+
#* Create a simple SoC with Vivado from existing IPs
−
#*Building a custom embedded Linux system to be run on the SoC
+
#* Build a custom embedded Linux system to run on the SoC
−
#*Using custom kernel drivers to control the IPs in the SoC
+
#* Using custom kernel drivers to control the IPs in the SoC
−
#Custom IP creation:  
+
# Create custom IPs:  
−
#*Development of simple custom IP
+
#* Development of simple custom IP from VHDL code
−
#*Integrating IP into the SoC using AXI bus  
+
#* Integrate the IP into the SoC using AXI bus  
−
#*Controlling the IP from Linux using custom driver
+
#* Control the IP from Linux using custom driver
−
#Setup 1 board system for the lab
+
# Build a simple audio processor system
−
#*Complex system integration
+
#* Complex system integration
−
#*Preparation for project
+
#* Preparation for course project
  
 
|style="vertical-align:top;"|
 
|style="vertical-align:top;"|
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|style="vertical-align:top;"|
 
|style="vertical-align:top;"|
 
'''Project''':
 
'''Project''':
−
*Component reuse and system improvement  
+
* Component reuse and system improvement  
−
*Functional test and analysis
+
* Functional test and analysis
−
*Work in a team
+
* Work in a team
 
|}
 
|}
  
−
===Labs Requirements===
+
==Requirements for Taking the Labs==
−
For these labs we assume that you have passed the following courses:
+
For these labs we assume that you have basic knowledge of the following:
−
* IAY0600: Digital Systems Design
+
* C language '''<- This is a must!'''
−
* IAY0330: Embedded Systems
+
* Digital Systems Design
−
So that you are familiar with digital systems and Embedded Systems. You should be familiar with High Level Description Languages like VHDL or Verilog (our main focus is on VHDL but if you know Verilog, it is also ok!).
+
* Embedded Systems Programming
  
−
===Lab Organization===
+
==Lab Organization==
 
{|
 
{|
 
|style="vertical-align:top;"|
 
|style="vertical-align:top;"|
 
'''Important dates'''
 
'''Important dates'''
  
−
* <span style="color:#FF0000">'''Week 1, week 2, week 3''':</span> Lab 1
+
* <span style="color:#FF0000">'''Week 2''':</span> Lab 1
−
* <span style="color:#FF0000">'''Week 4''':</span> Lab 2
+
* <span style="color:#FF0000">'''Week 3 ... week 5''':</span> Lab 2
−
* <span style="color:#FF0000">'''Week 5, week 6, week 7, week 8''':</span> Lab 3
+
* <span style="color:#FF0000">'''Week 6 ... week 9''':</span> Lab 3
−
* <span style="color:#FF0000">'''Week 9, week 10''':</span> Lab 4
+
* <span style="color:#FF0000">'''Week 10, week 11''':</span> Lab 4
−
* <span style="color:#FF0000">'''Week 11''':</span> Backup time
+
 
* <span style="color:#FF0000">'''End of week 15''':</span> Project Deadline
 
* <span style="color:#FF0000">'''End of week 15''':</span> Project Deadline
  
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|style="vertical-align:top;"|
 
|style="vertical-align:top;"|
−
'''Lab grading policy'''
+
'''Lab Grading Policy'''
−
* Basic Tutorials (Pass/Fail - prerequisite for project) (30%) (this is prerequisite for project)
+
* Tutorials (Pass/Fail - prerequisite for project)
−
* Project (20%) (prerequisite for Exam)  
+
* Project (50% of the grade)
−
* Final Course Examination (50%)
+
* Examination (50% of the grade)
 +
 
 +
'''In order to pass the course, you have to get a positive result in both the project and the exam.'''
 +
 
 +
'''You cannot finish the project without passing all tutorial labs!'''
  
 
|style="vertical-align:top;"|
 
|style="vertical-align:top;"|
 
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
 
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
−
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
 
−
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
 
−
&nbsp;
 
−
|style="vertical-align:top;"|
 
−
[[File:Grading.png|300px]]
 
  
−
|}
 
  
−
===Current Lab Results===
+
|style="vertical-align:top;"|
−
{|
+
[[File:Grading.png]]
−
! rowspan="2" | [[File:statistics-512.png|70px|left]]
+
−
! style="text-align:left;" | You can view you current lab results and statistics [https://docs.google.com/spreadsheets/d/1kVySrAtkDZ8vfu33Hx0nmoimQDt9LwRKIhNigxA1oAU/pubhtml?gid=1477271030&single=true '''here''']
+
−
|}
+
  
−
===Contact Us===
 
−
In case of any questions, please contact us:
 
−
 
−
{|
 
−
! rowspan="2" | [[File:redphone.png|70px|left]]
 
−
| style="text-align:left;" | '''• [http://ati.ttu.ee/socdesign/index.php/User:Kjans Karl Janson]'''
 
 
|}
 
|}
  
 
==Rules and Regulations==
 
==Rules and Regulations==
 +
<big><big>For your programs, <span style="color:green"> '''please follow the coding style:''' [https://blue.pri.ee/ttu/resources/coding-style/ [LINK]] </span></big></big>
 +
 
<span style="color:red"> '''Please read the following page before you start the course:''' </span>
 
<span style="color:red"> '''Please read the following page before you start the course:''' </span>
  
 
===Timing and Plans===
 
===Timing and Plans===
−
'''Please note that the project ends at the end of semester and will not be extended.'''
+
'''Please note that the project's (strong) deadline is on the last lab session, no extension will be made!'''
  
 
===General Rules===
 
===General Rules===
 
* <span style="color:red">'''Unplugging any cables from the lab computers is NOT ALLOWED!'''</span> If you use your own computer, please use Wi-Fi.
 
* <span style="color:red">'''Unplugging any cables from the lab computers is NOT ALLOWED!'''</span> If you use your own computer, please use Wi-Fi.
−
* It is '''OK''' to discuss your code with co-students during the labs.
+
* It is '''OK''' to discuss your code with colleagues during the labs.
−
* Copying co-student's code '''is not''' OK! You need to write it yourself.
+
* Copying a colleague's code '''is not''' OK! You need to write your own code.
−
* You '''must''' understand the code you write! We will check everyone.
+
* You '''must understand''' the code you write! We will check that you do!
 +
 
 +
===When writing Code===
 +
* '''The first thing your code MUST do is print out your name, ''otherwise you are not allowed defend the lab!''''' Kernel modules should print your name when they are inserted.
 +
(This requirement only applies for code that you have modified or written yourself)
  
−
===Writing Code===
+
Have in mind that you or someone else might want to reuse your code!
−
We would like to re-use your code later on so keep these things in mind:
+
* '''Use comments in your code.''' Even you, as the author of the code, may not understand it in the future.
−
* '''Use comments in your code.''' Even you, as the programmer, who wrote the code, will otherwise not understand your code after a while.
+
* '''Write a proper doc-string for the functions.''' It makes your life and of others much easier.
−
* '''Write a proper doc-string for the functions.''' It makes the life of you and others a lot easier.
+
* '''Use meaningful variable names.''' A variable named "counterMaxValue" is much easier to understand than one for the same purpose named "cMNum", for example.
−
* '''Use meaningful variable names.''' The purpose of a variable with the name "counterMaxValue" is much easier to understand that the same variable with the name "cMNum", for example.
+
  
 
===In Case of Problems===
 
===In Case of Problems===
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<!-- *[[Rules and Regulations]] -->
 
<!-- *[[Rules and Regulations]] -->
  
−
== Lab Tasks ==
+
=Lab Results=
−
===Lab Tutorials===
+
{|
 +
! rowspan="2" | [[File:statistics-512.png|70px|left]]
 +
! style="text-align:left;" | You can view you current lab results and statistics [https://docs.google.com/spreadsheets/d/1s_j7C3gGAiq2GUs0if-Slpvjip6cRRFBDOIC7cAv_GA/edit?usp=sharing '''here''']
 +
|}
 +
 
 +
=Contact Us=
 +
In case of any questions, please contact us:
 +
 
 +
{|
 +
! rowspan="2" | [[File:redphone.png|70px|left]]
 +
|-
 +
| style="text-align:left;" | '''• [http://ati.ttu.ee/socdesign/index.php/User:madker Madis Kerner]'''
 +
|}
 +
 
 +
= Labs =
 +
==Lab Tutorials==
 
Here you can find lab manuals for the tutorials:
 
Here you can find lab manuals for the tutorials:
−
*[[Lab 1|Lab 1: Kernel Driver]] <span style="color:red">'''[NOT UPDATED YET!]'''</span>
+
*[[Lab 1|Lab 1: Building Custom SoC on ZedBoard]]
−
*[[Lab 2|Lab 2: Building custom SoC on ZedBoard]] <span style="color:red">'''[NOT UPDATED YET!]'''</span>
+
*[[Lab 2|Lab 2: Kernel Driver]]
−
*[[Lab 3|Lab 3: Custom IP creation]] <span style="color:red">'''[NOT UPDATED YET!]'''</span>
+
*[[Lab 3|Lab 3: Custom IP creation]]  
−
*[[Lab 4|Lab 4: Setup 1 board system for the lab]] <span style="color:red">'''[NOT UPDATED YET!]'''</span>
+
*[[Lab 4|Lab 4: Setup 1 board system for the lab]]
  
−
===Labs additional readings===
+
==Additional Material==
  
−
Additional reading and more information about the labs can be found here:
+
Additional reading materials and more information about the labs can be found here:
−
====General documents====
+
−
*[[Creating a new project in Vivado]]
+
−
*[[Basic information about Linux]]
+
−
*[[Using ZedBoard]]
+
  
−
====Lab specific documents====
+
===Lab Specific Information===
−
*[[Lab1 additional material]]
+
*[[Lab1 Additional Material]]
−
*[[Lab2 additional material]]
+
*[[Lab2 Additional Material]]
 
*[[Lab3 additional material]]
 
*[[Lab3 additional material]]
−
*[[Lab4 additional material]]
+
*[[Lab4 additional material]] <!--<span style="color:red"> TBU </span>-->
  
−
===Using Own Computer for the Labs===
+
===General Information===
−
If you plan to use your own computer, please refer to the  [[Using Own Computer]] page.
+
*[[Creating New Vivado Project]]
−
 
+
*[[Basic Linux Usage]]
−
===Tutorial Labs Archive ===
+
*[[Using ZedBoard]]
−
*[[2016 Tutorials]]
+
−
*[[2015 Tutorials]]
+
−
*[[2014 Tutorials]]
+
  
−
=Audio Mixer Project=
+
==Audio Mixer Project==
−
==Project Description==
+
 
[[File:mixer.jpg|300px|right]]
 
[[File:mixer.jpg|300px|right]]
 
[[File:Zedboard_icon.png|53px|left]]
 
[[File:Zedboard_icon.png|53px|left]]
Line 156: Line 159:
 
* '''[[Project Description]] page'''.
 
* '''[[Project Description]] page'''.
  
−
==Git==
+
=Using Own Computer for the Labs=
 +
You can find some information about using your own computer on the [[Using Own Computer]] page.
 +
 
 +
'''Please note that using any other computer than the ones in lab is not officially supported. The information on this page is not checked by the lab supervisors and might not be up-to-date and might not work! We recommend not to rely your course progress on getting the systems running on your personal machine and use the lab computers!'''
 +
 
 +
However, if you decide to follow the instructions on the page, please let us know about the problems you encounter, so we can update the manual for the benefit of other students.
 +
 
 +
=Git=
 
[[File:github.png|43px|left]]
 
[[File:github.png|43px|left]]
 
The project code should be stored in git. Every component of the project should be uploaded as a separate branch.
 
The project code should be stored in git. Every component of the project should be uploaded as a separate branch.
Line 162: Line 172:
 
There exists a dedicated Github repository for the course, that can be accessed here: [https://github.com/karljans/SoC_Design]
 
There exists a dedicated Github repository for the course, that can be accessed here: [https://github.com/karljans/SoC_Design]
  
−
==Team Organization==
+
=Archive=
−
The following page is for clear and transparent team organization for design project:
+
'''Tutorials:'''
−
*[[Team Organization Spring 2014]]
+
*[[2016 Tutorials]]
−
*[[Team Organization Spring 2015]]
+
*[[2015 Tutorials]]
−
 
+
*[[2014 Tutorials]]
−
==Design project==
+
  
 +
'''Design project:'''
 
* [[Old project archive (2014/2015)]]
 
* [[Old project archive (2014/2015)]]

Latest revision as of 07:51, 20 September 2024

Logo SoC.png

Introduction

Welcome to the wiki for the SoC Design course! We started this series of labs/projects in 2014 and we are upgrading and fixing problems every year to make it better.

Slides for the introductory presentation are available here

Learning Objectives

After the completion of the labs, you will be able to:

Tutorials:

  1. Make Linux kernel drivers: Write a simple kernel driver for controlling a simple IP (intellectual property) on ZedBoard.
  2. Build custom SoC (System-on-Chip) on ZedBoard:
    • Create a simple SoC with Vivado from existing IPs
    • Build a custom embedded Linux system to run on the SoC
    • Using custom kernel drivers to control the IPs in the SoC
  3. Create custom IPs:
    • Development of simple custom IP from VHDL code
    • Integrate the IP into the SoC using AXI bus
    • Control the IP from Linux using custom driver
  4. Build a simple audio processor system
    • Complex system integration
    • Preparation for course project

                                  

Project:

  • Component reuse and system improvement
  • Functional test and analysis
  • Work in a team

Requirements for Taking the Labs

For these labs we assume that you have basic knowledge of the following:

  • C language <- This is a must!
  • Digital Systems Design
  • Embedded Systems Programming

Lab Organization

Important dates

  • Week 2: Lab 1
  • Week 3 ... week 5: Lab 2
  • Week 6 ... week 9: Lab 3
  • Week 10, week 11: Lab 4
  • End of week 15: Project Deadline

                                  

Lab Grading Policy

  • Tutorials (Pass/Fail - prerequisite for project)
  • Project (50% of the grade)
  • Examination (50% of the grade)

In order to pass the course, you have to get a positive result in both the project and the exam.

You cannot finish the project without passing all tutorial labs!

          


Grading.png

Rules and Regulations

For your programs, please follow the coding style: [LINK]

Please read the following page before you start the course:

Timing and Plans

Please note that the project's (strong) deadline is on the last lab session, no extension will be made!

General Rules

  • Unplugging any cables from the lab computers is NOT ALLOWED! If you use your own computer, please use Wi-Fi.
  • It is OK to discuss your code with colleagues during the labs.
  • Copying a colleague's code is not OK! You need to write your own code.
  • You must understand the code you write! We will check that you do!

When writing Code

  • The first thing your code MUST do is print out your name, otherwise you are not allowed defend the lab! Kernel modules should print your name when they are inserted.

(This requirement only applies for code that you have modified or written yourself)

Have in mind that you or someone else might want to reuse your code!

  • Use comments in your code. Even you, as the author of the code, may not understand it in the future.
  • Write a proper doc-string for the functions. It makes your life and of others much easier.
  • Use meaningful variable names. A variable named "counterMaxValue" is much easier to understand than one for the same purpose named "cMNum", for example.

In Case of Problems

Please use the following methods in the following order for solving your issues:

  1. Check the current lab's additional materials.
  2. Re-read the lab manual to make sure you did not miss anything.
  3. Google your problems
  4. Ask the lab assistants for help.

NOTE: In case you find a problem with the documentation, please tell the assistants. Then we can fix the problem and everyone will be happy :)


Lab Results

Statistics-512.png
 You can view you current lab results and statistics here

Contact Us

In case of any questions, please contact us:

Redphone.png
• Madis Kerner

Labs

Lab Tutorials

Here you can find lab manuals for the tutorials:

Additional Material

Additional reading materials and more information about the labs can be found here:

Lab Specific Information

General Information

Audio Mixer Project

Mixer.jpg
Zedboard icon.png

Design project is defined in each round for System on Chip design(IAY0550) students with the aim of providing them with real world experience of working on a SoC project, teamwork and project management. This wiki will serve as a platform for students to pass-on their designs and documents to students in the next round of course. Full description of the project can be found on the Project Description page

Using Own Computer for the Labs

You can find some information about using your own computer on the Using Own Computer page.

Please note that using any other computer than the ones in lab is not officially supported. The information on this page is not checked by the lab supervisors and might not be up-to-date and might not work! We recommend not to rely your course progress on getting the systems running on your personal machine and use the lab computers!

However, if you decide to follow the instructions on the page, please let us know about the problems you encounter, so we can update the manual for the benefit of other students.

Git

Github.png

The project code should be stored in git. Every component of the project should be uploaded as a separate branch.

There exists a dedicated Github repository for the course, that can be accessed here: [1]

Archive

Tutorials:

Design project:

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