Kevad 2011

Seminarid toimuvad teisipäeviti, 12:00-14:00

09/02 (Wednesday), 14:00, Samary Baranov, High Level Synthesis of Digital Systems (please note the date and time)

15/02, 13:00 Mati Tombak (Dept. of Informatics) - Floorplans, permutations and SSBDD (please note time)

22/02 Sergei Kostin - about Fault Diagnosis

01/03 Anton Tšepurov - zamiaCAD

08/03, 13:00 Artur Jutman - test systems/equipment installed at ATI (please note time)

22/03 DDECS try-outs: Anton Karputkin - Probabilistic equivalence checking with HLDD; others tbd;

05/04 DDECS try-outs: Mihkel Tagel - Communication Modelling and Synthesis for NoC-based Systems with Real-time Constraints; Sergei Kostin - Defect-Oriented Module-Level Fault Diagnosis in Digital Circuits

12/04, 11:00 Anton Tsertov - about progress in test/debug path modeling in microprocessor-based systems (please note time)

19/04 Igor Aleksejev - about new architectures and solutions in FPGA-based test application (including on the fly reconfigurability, high-speed and at-speed testing, applications to boards and 3D Systems)

26/04 Artur Jutman - SoC-Level Fault Management based on IEEE P1687 IJTAG

10/04, 14:00 Ott Ozolit - BigBluButton (cake.pld.ttu.ee)

17/05 Artur Jutman - FPGA-Enabled Embedded Instrumentation Platform (ETS try-out)

...

In the pipeline: Dmitri Mihhailov, Tatjana Schenova, Mairo Leier, Deniss Nikiforov, ...