Thomas Hollstein

Thomas Hollstein is a full Professor at the Department of Computer Engineering at Tallinn University of Technology (TUT). He graduated from Darmstadt University of Technology in Electrical Engineering / Computer Engineering in 1991. In 1992 he joined the research group of the “Microelectronic Systems Lab” at Darmstadt University of Technology. He worked in several research projects in neural and fuzzy computing and industrial VHDL based design. Since 1995 he focused his research on hardware/software codesign and in 2000 he received his Ph.D. on “Design and interactive Hardware/Software Partitioning of complex heterogeneous Systems” at Darmstadt University of Technology.
From 2000 to 2010 he has been working as a senior researcher , leading a research group focusing System-on-Chip (SoC) communication architectures. He has been an initiator for a new research initiative in the field of printed electronics at TU Darmstadt starting in 2005 has been leading a research group for printed electronics and RFIDs since 2005. This initiative led to a joint university/industry research lab, the TUD/Merck Lab . Since 2005 he has been responsible for the ITG/VDE competence initiative "Fokusprojekt RFID" and he is the initiator and main responsible for the European Workshop "RFID Systems and Technologies" (RFID-SysTech), which is continued as "Smart SysTech" - European Conference on Smart Objects, Systems and Technologies. In Darmstadt he has been giving a large number of lectures on VLSI design and CAD methods. Based on this teaching experiences and together with a colleague of the TU Darmstadt's "2010 FLEXI Award for Leadership in Education" of the FlexTech Alliance (USA). From 2001 until 2010 he has been member of a leader team initiating and establishing a new international master programme in “Information & Communication Engineering” at Darmstadt University of Technology. Since September 2010 Thomas Hollstein is a full professor at Tallinn University of Technology (Estonia) in the field of "Dependable Embedded Systems" . He is member of programme committees of several international conferences and workshops.

Research

Research Interests

• Networks-on-Chip (NoC): fault-tolerant and testable architectures
• System-on-Chip (SoC) Design: fault tolerant many core architectures
• Real-time and mixed-criticality systems
• Embedded Systems: Design, Dependability and Fault-tolerance
• Printable Electronics: Characterisation and Test Methods

Research Activities

• Dependable Networks-on-Chip (NoC) Architectures

Research Team:

• Gert Jervan (Co-Leadership Dependable NoC Research Branch)
• Mohsin Amin (Dependable NoC Architecture)
• Dennis Nikiforov (Platform Virtualisation)
• Siavoosh Payandeh Azad (Dependable NoC Routing, MPSoC Application Deployment)

• NoC Test Methods

Research Team:

• Jaan Raik (Co-Leadership NoC Test Research Branch)
• Vineeth Govind (Test Methods)

• Test Methods for Printable Electronics

Research Team:

• n.n. (Test of Printed Circuits)

Teaching

• IAY0570 Hardware/Software Co-Design ( Moodle: HSCO)
• IAY0550 System-on-Chip Design ( Moodle: SoCDesign)

Open Positions

• 1. NoC Traffic Modeling (for Ph.D. candidate) (Required Skills: Digitial Circuit Design, Hardware Description Languages, Graph Theory, Interest in Mathematics and Statistics)
• 2. Dependable NoC Architectures (for Ph.D. candidate) (Required Skills: Circuit Design, Hardware Description Languages, Graph Theory)

Topics for Bachelor and Master Theses

Several topics available for bachelor and master theses - be invited to come over to IT-232 to obtain a topic offer which is tailored with respect to your personal interests :)

Publications

Diploma Thesis and Ph.D. Thesis

[1] Thomas Hollstein: Entwurf und Implementierung eines Verfahrens zur strukturellen Synthese für eine vorgegebene Zielarchitektur, Diplomarbeit, Technische Hochschule Darmstadt, 1991

[2] Thomas Hollstein: Entwurf und interaktive Hardware-/Software-Partitionierung komplexer heterogener Systeme, Darmstadt University of Technology, Shaker- Verlag, Juni 2000, ISBN 3-8265-8956-4

Conference Proceedings (Editor)

[1] Proceedings of the 1st International Workshop on Reconfigurable Communication- centric Systems-on-Chip (ReCoSoC), Univ. Montpellier II, 2005

[2] 2. VDE/ITG Workshop RFID -- Intelligente Funketiketten - Chancen und Herausforderungen, VDE/ITG, VDE-Verlag, Juli 2006

[3] 3rd European Workshop on RFID Systems and Technologies (RFID SysTech), VDE/ITG, VDE-Verlag, Juni 2007, ISBN 978-3-8007-3045-2 and following workshops until today

Publications in Journals

[1] Manfred Glesner, Saman K. Halgamuge, Thomas A. Runkler, Harald Genther, Thomas Hollstein, Hans-Jürgen Herpel, Andreas König, Werner Pöchmüller: Intelligente Systeme mit Fuzzy--Logik, Mikroelektronik: Fachzeitschrift für Hersteller und Anwender, Vol.8, No.2, S.88-93, März 1994, ISSN 0931 2714, VDE Verlag

[2] Thomas Hollstein, Saman K. Halgamuge, Manfred Glesner: Computer Aided Design of Fuzzy Systems based on generic VHDL Specifications, IEEE Transactions on Fuzzy Systems, Vol.4, No.4, S.403-417, November 1996

[3] Thomas Hollstein, Ralf Ludewig, Heiko Zimmer, Christoph Mager, Simon Hohenstern, Manfred Glesner: HiNoC: A Hierarchical Generic Approach for on- Chip Communication, Testing and Debugging of SoCs, in: IFIP International Federation for Information Processing, Springer, S.39-54, August 2006, ISBN 978-0-387-33404-3; ISSN 1571-5736 (Print), 1861-2288 (Online)

[4] Thomas Hollstein, Manfred Glesner: Advanced hardware/software co-design on reconfigurable network-on-chip based hyper-platforms, International Journal on Computers and Electrical Engineering, Vol.33, No.4, S.310-319, Juli 2007, Editors: Mo Jamshidi, M. Abid

[5] Faizal Arya Samman, Thomas Hollstein, Manfred Glesner: Networks-on-Chip based on Dynamic Wormhole Packet Identity Management, VLSI Design, Journal of Hindawi Pub., Vol.09, S.1-15, Januar 2009, Article ID 941701, doi:10.1155/2009/941701

[6] Faizal Arya Samman, Thomas Hollstein, Manfred Glesner: Adaptive and Deadlock- Free Tree-Based Multicast Routing for Networks-on-Chip, IEEE Trans. on Very Large Scale Integration (VLSI) Systems, Vol.18, No.7, S.1067-1080, Juli 2010, doi:10.1109/TVLSI.2009.2019758

[7] Faizal Arya Samman, Thomas Hollstein, Manfred Glesner: New Theory for Deadlock-Free Multicast Routing in Wormhole-Switched Virtual-Channelless Networks-on-Chip, IEEE Transactions on Parallel and Distributed Systems, Vol.22, No.4, S.544-557, April 2011, doi:10.1109/TPDS.2010.120

[8] Faizal Arya Samman, Thomas Hollstein, Manfred Glesner: Wormhole Cut- Through Switching: Flit-Level Messages Interleaving for Virtual-Channelless Network-on-Chip, Elsevier Journal, Microprocessors and Microsystems, Vol.35, No.3, S.343-358, Mai 2011, doi:10.1016/j.micpro.2011.01.003

Publications in Conference Proceedings, Books and others

[1] Thomas Hollstein: Entwurf und Implementierung eines Verfahrens zur strukturellen Synthese für eine vorgegebene Zielarchitektur, Diplomarbeit, Technische Hochschule Darmstadt, 1991

[2] Norbert Wehn, Hans-Jürgen Herpel, Thomas Hollstein, Manfred Glesner: High- Level Synthesis Applied to an ASIC Emulation Board, in: Proc. of the EuroASIC '92, IEEE Computer Society Press, S.59-64, 1992, ISBN 0 8186 2845 6

[3] Norbert Wehn, Hans-Jürgen Herpel, Thomas Hollstein, Manfred Glesner: High- Level Synthesis in a Rapid-Prototype Environment for Mechatronic Systems, in: Proceedings of the EURO-DAC '92 Conference, IEEE Computer Society Press, S.188-193, September 1992, ISBN 0-8186-2845-6

[4] Saman K. Halgamuge, Thomas Hollstein, Andreas Kirschbaum, Manfred Glesner: Automatic Generation of Application Specific Fuzzy Controllers for Rapid Prototyping, in: Proc. of the IEEE International Conference on Fuzzy Systems '94, Juni 1994

[5] Thomas Hollstein, Saman K. Halgamuge, Andreas Kirschbaum, Manfred Glesner: Rapid-Prototyping von anwendungsspezifischen Fuzzy Controllern mit Field Programmable Gate Arrays, in: 4. Dortmunder Fuzzy-Tage - Tagungsband, Juni 1994

[6] Thomas Hollstein, Ulrike Zahm, Manfred Glesner: A New Concept for a Self Learning Kit for FPGA Design, in: Proceedings of the Baltic Electronics Conference, Oktober 1994

[7] Raimund Ubar, Thomas Hollstein, Manfred Glesner: New Curricula and a Competence Centre through TEMPUS at the Technical University of Tallinn, in: Workshop on Design Methodologies for Microelectronics, September 1995

[8] Ulrike Zahm, Thomas Hollstein, Hans-Jürgen Herpel, Norbert Wehn, Manfred Glesner: Advanced Method for Industry Related Education with an FPGA Design Self-Learning Kit, in: Proceedings of the 5th International Workshop on Field Programmable Logic and Applications, S.241-250, 1995

[9] Michael Gasteier, Thomas Hollstein, Andreas Kirschbaum: Rapid Prototyping with FPGAs, in: Proc. of the Workshop on Specification and Implementation of Digital Systems, April 1995

[10] Manfred Glesner, Thomas Hollstein, Michael Münch, Michael Gasteier: Hardware/ Software Co-Design: State-of-the-Art and Future Directions, in: Proceedings of the Baltic Electronics Conference, S.9-16, Oktober 1996, -- Invited Talk --

[11] Michael Gasteier, Thomas Hollstein, Ulrich Mayer, Michael Münch, Manfred Glesner: An Interactive Approach to Hardware/Software Co-Design, in: Proc. of the IFIP Workshop on Logic and Architecture Synthesis, S.211-218, Dezember 1996

[12] Wolfgang Ecker, Claus Schneider, Viktor Preis, Ke Yang, Thomas Hollstein: SPIDER: A Utility for Parallel Synthesis of Structured Designs, in: Proceedings of the ESNUG '97, März 1997

[13] Saman K. Halgamuge, Thomas Hollstein, Manfred Glesner: A Prototype Implementation of Self Evolving Neural Networks, in: Proc. of the Eighth Australian Conference on Neural Networks, Juni 1997

[14] Thomas Hollstein, Andreas Kirschbaum, Manfred Glesner: A prototyping environment for fuzzy controllers, in: Proc. of the 7th Int. Workshop on Field-Programmable Logic and Applications (FPL), Springer, S.482-490, September 1997, ISBN 3-540-63465-7

[15] Thomas Hollstein, Andreas Kirschbaum, Saman K. Halgamuge, Manfred Glesner: Application Specific Fuzzy Processors, in: Proc. of the International Symposium on Nonlinear Theory and its Applications (NOLTA), S.133-136, November 1997, -- Invited Talk --

[16] Thomas Hollstein, Jürgen Becker, Andreas Kirschbaum, Frank-Michael Renner, Manfred Glesner: DICE - An Interactive Approach to Hardware/Software Co- Design of Heterogeneous Real-Time Systems, in: Proceeding of the Baltic Electronics Conference 1998 (BEC'98), S.97-100, Oktober 1998

[17] Thomas Hollstein, Jürgen Becker, Andreas Kirschbaum, Manfred Glesner: Hi- Part: A New Hierarchical Semi-Interactive HW/SW Partitioning Approach with Fast Debugging for Real-Time Embedded Systems, in: Proc. of 6th International Workshop on Hardware/Software Codesign (CODES/CASHE´98), März 1998

[18] Marc Theisen, Thomas Hollstein, Jürgen Becker, Manfred Glesner: A New Approach for Parallelising and Optimising Hardware Compilation and Partitioning in Hardware/Software Co-Design, in: Proceedings of the 2nd Electronic Circuits and Systems Conference, S.85-88, September 1999

[19] Wolfgang Ecker, Manfred Glesner, Thomas Hollstein, Marc Theisen, Andre Windisch, Ke Yang: A Flexibly Connected Data System for VHDL Source Code Analysis, Transformation and Processing, in: Proceedings of the Workshop Entwurf Integrierter Schaltungen (E.I.S.), S.209-216, September 1999

[20] Matthias Meixner, Jürgen Becker, Thomas Hollstein, Manfred Glesner: Objected- oriented Specification Approach for Synthesis of Hardware-/Software Systems, in: Proc. of the GI/ITG/GMM Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, Februar 1999

[21] Manfred Glesner, Jürgen Becker, Thomas Hollstein, Andreas Kirschbaum, Stefan Ortmann: Hardware/Software Co-Design für Eingebettete Systeme in der Informationstechnik, in: thema FORSCHUNG 1/99, TU Darmstadt, Verlag f. Marketing und Kommunikation, Technische Universität Darmstadt, Januar 1999

[22] Ulrich Mayer, Leandro S. Indrusiak, Jürgen Becker, Thomas Hollstein, Ricardo Reis, Manfred Glesner: An Internet-Capable CAD Suite for the Mulit-Level Design of Complex Microelectronic Systems, in: Proc. of Design, Automation and Test In Europe Conference, User Forum, S.303-303, März 2000, -- Poster --

[23] Manfred Glesner, Frank-Michael Renner, Burkart Voss, Thuyen Le, Thomas Hollstein: Rapid-Prototyping eingebetteter mikroelektronischer Systeme für die Mechatronik, in: Thema Forschung, 1/2000., Technische Universität Darmstadt, 2000

[24] Thomas Hollstein, Manfred Glesner: An efficient metrics for timing-driven hardware-/software co-synthesis within the DICE design environment, in: Proceedings of the 7th Biennial Baltic Electronic Conference (BEC), 2000

[25] Thomas Hollstein: Entwurf und interaktive Hardware-/Software-Partitionierung komplexer heterogener Systeme, Darmstadt University of Technology, Shaker- Verlag, Juni 2000, ISBN 3-8265-8956-4

[26] Thomas Hollstein, Zebo Peng, Raimund Ubar, Manfred Glesner: Challenges for Future System-on-Chip Design, in: European Conference on Circuit Theory and Design, 2001

[27] Octavian Mitrea, Juan Ocampo Hidalgo, Lukusa Kabulepa, Thomas Hollstein, Manfred Glesner: Trends and Challenges for the Design of Integrated Microelectronic Communication Systems, in: Thema Forschung 1/2001, Technische Universität Darmstadt, 2001

[28] Jochen Mades, Thomas Schneider, Andre Windisch, Thomas Hollstein, Jürgen Becker, Manfred Glesner: Concept of a Joined University/Industry Course for Mixed-Signal System-on-Chip Design, in: Proceedings of the 2001 International Conference on Microelectronic Systems Education, 2001

[29] Thomas Schneider, Jochen Mades, Andre Windisch, Thomas Hollstein, Manfred Glesner, Thomas Kruse: Eine WEB-Basierte Simulationsumgebung fuer VHDL- AMS, in: ITG/GI/GMM-Workshop "Entwurf Integrierter Schaltungen", EIS, 2001

[30] Thomas Hollstein, Ralf Ludewig, Clemens Schlachta, Manfred Glesner: Design and Prototyping of Embedded Systems on Chip for Mechatronic Systems, in: Proceedings of the 8th Biennial Baltic Electronic Conference (BEC), 2002

[31] Andre Schneider, Karl-Heinz Diener, Gert Jervan, Zebo Peng, Jaan Raik, Raimund Ubar, Thomas Hollstein, Manfred Glesner: High-Level Synthesis and Test in the MOSCITO-Based Virtual Laboratory, in: Proceedings of the 8th Biennial Baltic Electronic Conference (BEC), 2002

[32] Andre Schneider, Karl-Heinz Diener, Eero Ivast, Raimund Ubar, Elena Gramatova, Thomas Hollstein, Wieslaw Kuzmicz: Integrated Design and Test Generation under the Internet Based Environment MOSCITO, in: EUROMICRO Symposium on Digital System Design (DSD), S.187-194, September 2002

[33] Manfred Glesner, Thomas Hollstein, Ralf Ludewig, Clemens Schlachta: Advanced Embedded System-on-Chip Design for Applications in Mechatronics - Trends and Perspectives, in: Msy'02 Embedded Systems in Mechatronics, Oktober 2002, -- Invited Talk --

[34] Tudor Murgan, Mihail Petrov, Alberto Garcia Ortiz, Ralf Ludewig, Peter Zipf, Thomas Hollstein, Manfred Glesner, Bernhard Oelkrug, Jörg Brakensiek: Evaluation and Run-Time Optimisation of On-Chip Communication Structures in Reconfigurable Architectures, in: Proc. of the Intl. Conf. on Field Programmable Logic and Applications (FPLA), S.1111-1114, 2003

[35] Thomas Hollstein, Ralf Ludewig, Christoph Mager, Peter Zipf, Manfred Glesner: A hierarchical generic approach for on-chip communication, testing and debugging of SoCs, in: IFIP International Conference on Very Large Scale Integration of System-on-Chip (VLSI-SoC), S.44-49, 2003

[36] Thomas Hollstein, Heiko Zimmer, Tudor Murgan, Manfred Glesner: Flexible Communication-Centric System-on-Chip Platforms for Ambient Appliances, in: VDE Kongress 2004 - Tagungsband, S.127-132, Oktober 2004

[37] Manfred Glesner, Thomas Hollstein, Tudor Murgan: System Design Challenges in Ubiquitous Computing Environments, in: Proc. of the Intl. Conf. on Microelectronics (ICM), S.11-14, 2004, -- Invited Talk --

[38] Manfred Glesner, Thomas Hollstein, Tudor Murgan: System Design Challenges in Ubiquitous Computing Environments, in: Proc. of the 9th Biennial Conf. on Electronics and Microsystem Technology (Baltic Electronics Conf., BEC), S.343-346, 2004, -- Invited Talk --

[39] Ralf Ludewig, Thomas Hollstein, Falko Schütz, Manfred Glesner: Architecture for Testing and Debugging of System-on-Chip Components, in: IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS), 2004

[40] Ralf Ludewig, Thomas Hollstein, Falko Schütz, Manfred Glesner: Rapid Prototyping of an integrated Testing and Debugging Unit, in: Proc. of the International Workshop on Rapid System Prototyping (RSP), S.187-192, 2004

[41] Manfred Glesner, Leandro Soares Indrusiak, Peter Zipf, Thilo Pionteck, Mihail Petrov, Heiko Zimmer, Tudor Murgan: Reconfigurable Platforms for Ubiquitous Computing, in: Proc. of the Conf. on Computing Frontiers, ACM Press, S.377-389, 2004

[42] Manfred Glesner, Hao Wang, Thomas Hollstein: Microelectronics meets Bionics, in: in: Bionik, Springer Verlag, 2004, ISBN 3-540-21890-4

[43] Peter Zipf, Heiko Hinkelmann, Adeel Ashraf, Thomas Hollstein, Manfred Glesner: An Asynchronous Switch Implementation for Systems-on-a-Chip, in: GI/ITG/GMM Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2004

[44] Thomas Hollstein, Heiko Zimmer, Simon Hohenstern, Manfred Glesner: HiNoC: A Flexible Multi-mode Transmission Network-on-Chip Platform, in: Proceedings of the 9th Biennial Baltic Electronic Conference (BEC), 2004

[45] Thomas Hollstein, Oliver Soffke, Heiko Zimmer, Octavian Mitrea, Manfred Glesner: Neue Entwurfsverfahren beim System-on-Chip-Design, NTZ, No.1, S.34-37, 2005, VDE-Verlag

[46] Martin Schäfer, Thomas Hollstein, Heiko Zimmer, Manfred Glesner: Deadlock- Free Routing and Component Placement for Irregular Mesh-based Networks- on-Chip, in: Proc. of the International Conference on Computer-Aided Design (ICCAD), S.238-245, 2005

[47] Manfred Glesner, Heiko Hinkelmann, Thomas Hollstein, Leandro Indrusiak, Tudor Murgan, Abdulfattah M. Obeid, Mihail Petrov, Thilo Pionteck, Peter Zipf: Reconfigurable Embedded Systems: An Application-Oriented Perspective on Architectures and Design Techniques, in: Embedded Computer Systems: Architectures, MOdeling, and Simulation - SAMOS Workshop, S.12-21, 2005

[48] Proceedings of the 1st International Workshop on Reconfigurable Communication- centric Systems-on-Chip (ReCoSoC), Univ. Montpellier II, 2005

[49] Heiko Zimmer, Stefan Zink, Thomas Hollstein, Manfred Glesner: Buffer-architecture exploration for routers in a hierarchical network-on-chip, in: 19th IEEE International Parallel and Distributed Processing Symposium, April 2005

[50] Thomas Hollstein, Sujan Pandey, Manfred Glesner: Advanced On-Chip Communication Architectures and Routing Methods for Systems-on-Chip, in: Pro- ceedings of the 1st International Workshop on Reconfigurable Communicationcentric Systems-on-Chip (ReCoSoC), S.85-92, 2005

[51] Oliver Soffke, Ping Zhao, Thomas Hollstein, Manfred Glesner: Modelling of HF and UHF RFID Technology for System and Circuit Level Simulations, in: Proc. of the 3rd European Workshop on RFID Systems and Technologies (RFID-SysTech), VDE-Verlag, Juni 2005, ISBN 978-3-8007-3045-2

[52] Oliver Soffke, Thomas Hollstein, Manfred Glesner, Ralf Kügler: Über die Integration von analytischen und tabellarischen S-Parametermodellen in Transientensimulationen, in: 2. VDE/ITG Workshop RFID -- Intelligente Funketiketten - Chancen und Herausforderungen, 2006

[53] 2. VDE/ITG Workshop RFID -- Intelligente Funketiketten - Chancen und Herausforderungen, VDE/ITG, VDE-Verlag, Juli 2006

[54] Manfred Glesner, Tudor Murgan, Thomas Hollstein, Peter Zipf, Oliver Soffke, Heiko Hinkelmann: System Design Challenges in the Nanoscale Era,, in: Sci. Bull. of the Fac. of Electronics, Telecommunications and Informatics, Sci. Bull. of the Fac. of Electronics, Telecommunications and Informatics, Vol.12, S.3-14, 2007

[55] Manfred Glesner, Hans Eveking, Thomas Hollstein, Tudor Murgan: Elektronik im Nanozeitalter: Surfing on Moore's Law, in: Thema Forschung 2/2007, Technische Universität Darmstadt, S.52-57, 2007

[56] 3rd European Workshop on RFID Systems and Technologies (RFID SysTech), VDE/ITG, VDE-Verlag, Juni 2007, ISBN 978-3-8007-3045-2

[57] Ulrich Waldmann, Thomas Hollstein, Karsten Sohr: RFID-Studie 2007: Technologieintegrierte Datensicherheit bei RFID-Systemen, Bundesministerium für Forschung und Bildung (BMBF), Bundesministerium für Forschung und Bildung (BMBF), 2007, http://publica.fraunhofer.de/eprints/N-58724.pdf

[58] Thomas Hollstein, Manfred Glesner, Ulrich Waldmann, Henk Birkholz, Karsten Sohr: Security Challenges for RFID Key Applications, in: Proc. of the 3rd European Workshop on RFID Systems and Technologies (RFID-SysTech), VDEVerlag, Juni 2007, ISBN 978-3-8007-3045-2

[59] Faizal Arya Samman, Thomas Hollstein, Manfred Glesner: Multicast Parallel Pipeline Router Architecture for Networks-on-Chip, in: Proceedings of the Conference on Design Automation and Test in Europe (DATE) 2008, S.1396-1401, März 2008

[60] Faizal Arya Samman, Thomas Hollstein, Manfred Glesner: Flexible Parallel Pipeline Network-on-Chip Based Dynamic Packet Identity Management, in: Proc. of the Reconfigurable Architecture Workshop (RAW) 2008 within the 22nd IEEE Int'l Parallel and Distributed Processing Symposium, April 2008

[61] Faizal Arya Samman, Thomas Hollstein, Manfred Glesner: NoCs with combined low and high priority wormhole packet delivery services, in: Proc. of the Electronic Design Automation Workshop 2008, edacentrum, Mai 2008

[62] Faizal Arya Samman, Thomas Hollstein, Manfred Glesner: Planar Adaptive Router Microarchitecture for Tree-based Multicast Network-on-Chip, in: Proc. of the 1st International Workshop on Network-on-Chip Architectures within the 41th IEEE/ACM Int'l Symp. on Microarchitecture, S.6-13, November 2008 [63] Faizal Arya Samman, Thomas Hollstein, Manfred Glesner: Flexible Infrastructure for Network-on-Chip Prototypes Development based on VHDL-Modular- Oriented Design, in: Proc. of the ISSM'08, Mai 2008

[64] Faizal Arya Samman, Thomas Hollstein, Manfred Glesner: Network-on-Chips: Potential Synergy between Parallel Computing and Multicore Processor Systems, in: Proc. of the ISSM'08, Mai 2008

[65] Faizal Arya Samman, Thomas Hollstein, Manfred Glesner: Test Strategy for Network-on-Chip Supporting Unicast-Multicast Data Transport, in: Workshop of Diagnostic Services in Network on Chips (DSNoC'09), in conjunction with Design Automation and Test in Europe (DATE'09) Conference and Exhibition, April 2009

[66] Ping Zhao, Thomas Hollstein, Manfred Glesner: Analysis on Power Harvesting Circuits with Tuneable Matching Network for Improved Efficiency, in: Proc. of PRIME PH.D. Research in Microelectronics and Electronics, Juli 2009

[67] Ping Zhao, Yuliang Zheng, Thomas Hollstein, Rolf Jakoby, Manfred Glesner: Real-Time Operation-Based Power Consumption Analysis for Passive UHF RFID Transponders, in: 54th International Wissenschaftliches Kolloquium (IWK), September 2009

[68] Ping Zhao, Thomas Hollstein, Kun Fang, Manfred Glesner, Yuliang Zheng, Rolf Jakoby: A Novel Software Defined Radio Architecture with Automatic Power- Control for RFID Readers, IEEE, International Conference on Microwaves, Communications, Antennas and Electronics, S.1-6, November 2009

[69] Leandro Heleno Möller, Hélio Vieira Jesus, Fernando Moraes, Leandro Soares Indrusiak, Thomas Hollstein, Manfred Glesner: Graphical Interface for Debugging RTL Networks-on-Chip, in: Proc. of BEC 2010 (12th Biennial Baltic Electronics Conference), S.181-184, Oktober 2010

[70] Sebastian Pankalla, Thomas Hollstein, Manfred Glesner: Design of a reference topology for printable transistors, capacitors and diodes used in organic circuits and applications, in: Proceedings of the LOPE-C 2010, 2010

[71] Sebastian Pankalla, Thomas Hollstein, Manfred Glesner: Static modelling of organic transistors, inverters and ring oscillators for circuit design, in: Proceedings of the 6th International Conference on Organic Electronics ICOE 2010, 2010

[72] Hans-Peter Keil, K. Rhazi, Thomas Hollstein, Manfred Glesner: Physical Based Simulation for Printed ZnO-Transistors, in: Proceedings of the LOPE-C 2010, S.213-216, 2010

[73] Mihkel Tagel, Peeter Ellervee, Thomas Hollstein, Gert Jervan: Communication Modelling and Synthesis for NoC-based Systems with Real-time Constraints, in: Proceedings of the DDECS 2011 (14th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems), April 2011